Fabrication and assembly automation of TERabit optical transceivers based on InP EML arrays and a Polymer Host platform for optical InterConnects up to 2 km and beyond
[January 2019 – December 2022]
PCRL coordinates the TERIPHIC project, which aims to develop optical interfaces with Terabit capacity for datacom applications. As the industry moves towards Terabit-scale modules, a practical approach involves scaling current 400G modules—built on four parallel lanes operating with PAM-4 at 53 Gbaud. While increasing the number of lanes seems straightforward, it presents significant challenges related to fabrication complexity, assembly precision, and overall manufacturability and cost.
TERIPHIC addresses these challenges by leveraging photonic integration and developing a seamless chain of component fabrication, automated assembly, and module characterization processes—laying the foundation for high-volume production of Terabit modules.
The project brings together EML arrays in the O-band, PD arrays, and a polymer chip serving as the host platform for integrating these arrays along with the wavelength multiplexing and demultiplexing functions. Integration relies on butt-end coupling, with automated alignment and attachment processes developed for commercial equipment. The optical subassembly is mounted on the module’s mainboard alongside linear driver and TIA arrays, employing the standard assembly methodologies of MLNX and using polymer FlexLines for interconnection.
Using this approach, TERIPHIC develops:
- Pluggable modules with 8 lanes (800G capacity)
- Mid-board modules with 16 lanes (1.6T capacity)
- Reach of at least 2 km
Compared to existing 400G standards, TERIPHIC’s modules cut power consumption per Gb/s by 50% and achieve a cost of 0.3 €/Gb/s. Once assembled, these modules are mounted on MLNX switch line cards for testing in real-world settings. Additionally, the project conducts a study to consolidate its methods and establish a pilot assembly line for post-project commercialization.
