Role: Cordinator
Acronym: SPIRIT
Type of action: CP-FP-INFSO
Call identifier: FP7-ICT-2013-11

SPIRIT:Software-defined energy-efficient Photonic transceivers IntRoducing Inteligence and dynamicity in Terabit superchannels for flexible optical networks

Duration in months: 30
Fixed keyword 1: Photonics

Bandwidth‐hungry end‐user applications are stretching physical layer capacity and dictating the migration towards software-defined flexible architectures. Fully-programmable optical components supporting rate- and format-adaptation are urgently needed. SPIRIT will fabricate low-cost, energy-efficient flexible transceivers that are capable of gridless operation and are compatible with both current and future applications. Single- and multi-carrier (OFDM) QAM formats will be supported up to a spectral efficiency of 16 bits/s/Hz (DP-256-QAM), for throughputs of up to 1Tbit/s from a single-package transceiver. Interfacing to an external FPGA will allow dynamic adjustment of the symbol rate (up to 32GBaud) and modulation format.  Novel segmented-electrode InP IQ-MZMs with Vπ≈1V will be developed. This allows direct digital drive using mature, highyield CMOS electronics; SPIRIT will therefore benefit from the dominant technology in IC fabrication, constituting a costeffective, ultra-low-power solution. On‐chip, 5-bit multi-level functionality will enable arbitrary optical waveform generation and transmitter-side DSP. Record-low power consumption (1.8W per MZM arm) for a device of this resolution is targeted. Compared to current transmitters, more than 50% power consumption reduction is expected for 400G and 1T applications. The CMOS electronics and InP photonics will be integrated on a SOI platform, including coherent receivers and a novel, flexible MUX/DEMUX based on micro-ring filters, enabling spectrally efficient aggregation/segmentation of superchannels. The latter will be tunable across the entire C-band for truly gridless operation and fine-granularity spectrum slicing. SPIRIT will introduce intelligence in the optical layer. It envisages development of a software-defined network emulation platform that includes DSP performance monitoring for QoS management at the physical layer. Participation by industry leaders ensures a clear commercial exploitation path.